After you have built the schematic, you can map it to get a skeleton structure of the layout. Don’t expect it to give you fully layout material. The tool is capable of selecting the standard layout views of nmos and pmos transistors and put them into the layout tool. The way to do that is :
Click on Layout XL, and Create New.
I have taken the example of a 2 input NOR. So, enter the cell name and click on OK. Virtuoso Layout XL will now open up and click on Design > Gen From Source …
By default the pins are in p-well layer, which you need to change to metal1 or allot whatever layer you want each pin to be on. Click on OK.
You’ll see a boundary box (in purple), inside which you need manually place each of the nmos and pmos instances. Note that the layout of nmos and pmos instances have been taken from the associated Techfile. Next you can place the pins on the edges of the purple boundary. Wait ! There’s a neat way to do this,
click on Placement > Pin Placement.
Arrange and setup the options as shown. You can click on Interleave and it will arrange the pins in an alternate fashion. Or click on each pin, change the Edge (to left, right, top or bottom) and click on Apply. For gnd! and vdd!, after clicking on Apply, you can convert it into a H-rail or V-rail by clicking on the appropriate button. Then when its ready, click on Close. In the main Layout window, you can click and drag each nmos/pmos instance into the boundary box. As you do that, you’ll notice flylines that show the connectivity between the pins. Also, you’ll see that the same component will get highlighted in your schematic window ( that’s because these two are properly mapped). Try CTRL-F to see the original layout and the metal layers of the instances.
Happy layouting !
eecad 